1. Field
The present disclosure relates generally to an interface between a host processor and a peripheral device such as a camera and, more particularly, to improving error correction processes on an N-factorial or camera control communication interface bus.
2. Background
Manufacturers of mobile devices, such as cellular phones, may obtain components of the mobile devices from various sources, including different manufacturers. For example, an application processor in a cellular phone may be obtained from a first manufacturer, while the display for the cellular phone may be obtained from a second manufacturer. The application processor and a display or other device may be interconnected using a standards-based or proprietary physical interface. For example, a display may provide an interface that conforms to the Display System Interface (DSI) standard specified by the Mobile Industry Processor Interface Alliance (MIPI).
In one example, a multi-signal data transfer system may employ multi-wire differential signaling such as 3-phase or N-factorial (N!) low-voltage differential signaling (LVDS), transcoding (e.g., the digital-to-digital data conversion of one encoding type to another) may be performed to embed symbol clock information by causing a symbol transition at every symbol cycle, instead of sending clock information in separate data lanes (differential transmission paths). Embedding clock information by transcoding is an effective way to minimize skew between clock and data signals, as well as to eliminate the necessity of a phase-locked loop (PLL) to recover the clock information from the data signals.
In another example, a camera control interface (CCI) defined by MIPI standards uses a two-wire, bi-directional, half duplex, serial interface configured as a bus connecting a master and one or more slaves. Conventional CCI is compatible with a protocol used in a variant of the Inter-Integrated Circuit (I2C) bus and is capable of handling multiple slaves on the bus, with a single master. The CCI bus may include Serial Clock (SCL) and Serial Data (SDA) lines. CCI devices and I2C devices can be deployed on the same bus such that two or more CCI devices may communicate using CCI protocols, while any communication involving an I2C bus uses I2C protocols. A CCI extension (CCIe) bus may be used to provide higher data rates for devices that are compatible with CCIe bus operations. Such devices may be referred to as CCIe devices, and the CCIe devices can attain higher data rates when communicating with each other by encoding data as symbols transmitted on both the SCL line and the SDA line of a conventional CCI bus.
There exists an ongoing need for optimized communications in general and improved reliability of data transfer on multi-signal wire communication links.